569 lines
12 KiB
Plaintext
569 lines
12 KiB
Plaintext
%TF.GenerationSoftware,KiCad,Pcbnew,10.0.5*%
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%TF.CreationDate,2026-10-06T13:34:31+02:00*%
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%TF.ProjectId,PlugAndCharge_V1,506c7567-416e-4644-9368-617267655f56,rev?*%
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%TF.SameCoordinates,Original*%
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%TF.FileFunction,Copper,L4,Bot*%
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%TF.FilePolarity,Positive*%
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%FSLAX46Y46*%
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G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
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G04 Created by KiCad (PCBNEW 10.0.5) date 2026-10-06 13:34:31*
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%MOMM*%
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%LPD*%
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G01*
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G04 APERTURE LIST*
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%TA.AperFunction,ComponentPad*%
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%ADD10C,1.530000*%
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%TD*%
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%TA.AperFunction,ComponentPad*%
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%ADD11R,2.100000X2.100000*%
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%TD*%
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%TA.AperFunction,ComponentPad*%
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%ADD12C,2.100000*%
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%TD*%
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%TA.AperFunction,HeatsinkPad*%
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%ADD13C,0.600000*%
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%TD*%
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%TA.AperFunction,ComponentPad*%
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%ADD14O,1.350000X1.100000*%
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%TD*%
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%TA.AperFunction,ViaPad*%
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%ADD15C,0.600000*%
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%TD*%
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%TA.AperFunction,Conductor*%
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%ADD16C,0.300000*%
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%TD*%
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%TA.AperFunction,Conductor*%
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%ADD17C,0.500000*%
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%TD*%
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G04 APERTURE END LIST*
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D10*
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%TO.P,TP16,1,1_1*%
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%TO.N,/GPIO_EN*%
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X202750000Y-140500000D03*
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%TD*%
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%TO.P,TP17,1,1_1*%
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%TO.N,/GPIO_0*%
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X213750000Y-140500000D03*
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%TD*%
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%TO.P,TP15,1,1_1*%
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%TO.N,/ESP_TxD*%
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X206500000Y-140500000D03*
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%TD*%
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%TO.P,TP14,1,1_1*%
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%TO.N,/ESP_RxD*%
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X210000000Y-140500000D03*
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%TD*%
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%TO.P,TP3,1,1_1*%
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%TO.N,/+3V3_RED*%
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X268800000Y-93600000D03*
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%TD*%
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D11*
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%TO.P,J4,1,1_1*%
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%TO.N,/CP_N*%
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X252450020Y-135500000D03*
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D12*
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%TO.P,J4,2*%
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%TO.N,N/C*%
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X252450020Y-140580000D03*
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%TD*%
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D10*
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%TO.P,TP1,1,1_1*%
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%TO.N,GND*%
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X268700000Y-123500000D03*
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%TD*%
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%TO.P,TP4,1,1_1*%
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%TO.N,/CP_PWM*%
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X268200000Y-129000000D03*
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%TD*%
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D11*
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%TO.P,J2,1,1_1*%
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%TO.N,/CP_PWM*%
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X232450020Y-135425000D03*
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D12*
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%TO.P,J2,2*%
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%TO.N,N/C*%
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X232450020Y-140505000D03*
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%TD*%
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D13*
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%TO.P,U1,41,GND_41*%
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%TO.N,GND*%
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X207200000Y-100850000D03*
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X208600000Y-100850000D03*
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X206500000Y-100150000D03*
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X207900000Y-100150000D03*
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X209300000Y-100150000D03*
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X207200000Y-99450000D03*
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X208600000Y-99450000D03*
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X206500000Y-98750000D03*
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X207900000Y-98750000D03*
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X209300000Y-98750000D03*
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X207200000Y-98050000D03*
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X208600000Y-98050000D03*
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%TD*%
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D14*
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%TO.P,J5,S1,SHIELD_S1*%
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%TO.N,GND*%
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X223350000Y-78715000D03*
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%TO.P,J5,S2,SHIELD_S2*%
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X223350000Y-83015000D03*
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%TO.P,J5,S3,SHIELD_S3*%
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X228150000Y-78715000D03*
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%TO.P,J5,S4,SHIELD_S4*%
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X228150000Y-83015000D03*
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%TD*%
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D10*
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%TO.P,TP9,1,1_1*%
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%TO.N,/RED_MISO*%
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X220400000Y-126600000D03*
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%TD*%
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%TO.P,TP11,1,1_1*%
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%TO.N,GND*%
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X220400000Y-134800000D03*
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%TD*%
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%TO.P,TP6,1,1_1*%
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%TO.N,/CP_N*%
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X268400000Y-139600000D03*
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%TD*%
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%TO.P,TP8,1,1_1*%
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%TO.N,/RED_SPI_CSn*%
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X220400000Y-122600000D03*
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%TD*%
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%TO.P,TP7,1,1_1*%
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%TO.N,/RED_SPI_INT*%
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X220400000Y-118800000D03*
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%TD*%
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D11*
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%TO.P,J3,1,1_1*%
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%TO.N,/CP*%
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X242450020Y-135500000D03*
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D12*
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%TO.P,J3,2*%
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%TO.N,N/C*%
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X242450020Y-140580000D03*
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%TD*%
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D10*
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%TO.P,TP12,1,1_1*%
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%TO.N,GND*%
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X268800000Y-99000000D03*
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%TD*%
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%TO.P,TP2,1,1_1*%
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%TO.N,+3.3V*%
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X268700000Y-113700000D03*
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%TD*%
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%TO.P,TP5,1,1_1*%
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%TO.N,/CP*%
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X268400000Y-134200000D03*
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%TD*%
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%TO.P,TP10,1,1_1*%
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%TO.N,/RED_SPI_CLK*%
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X220400000Y-130800000D03*
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%TD*%
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%TO.P,TP13,1,1_1*%
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%TO.N,/RED_MOSI*%
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X220600000Y-114800000D03*
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%TD*%
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D15*
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%TO.N,/ESP_RxD*%
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X205625000Y-87625000D03*
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%TO.N,/ESP_TxD*%
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X204375000Y-86875000D03*
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%TO.N,/RED_MOSI*%
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X227368400Y-93250000D03*
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X227368400Y-99500000D03*
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%TO.N,/STM32_BOOT*%
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X213000000Y-128800000D03*
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X204538700Y-82661300D03*
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%TO.N,GND*%
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X258750000Y-84350000D03*
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X269750000Y-81450000D03*
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X241550000Y-113550000D03*
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X263750000Y-108450000D03*
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X199600000Y-135400000D03*
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X263750000Y-97050000D03*
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X234650000Y-108450000D03*
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X234650000Y-89450000D03*
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X269750000Y-83050000D03*
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X263750000Y-104650000D03*
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X249500000Y-94500000D03*
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X199735400Y-116923800D03*
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X268750000Y-81450000D03*
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X246000000Y-98500000D03*
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X251200000Y-113600000D03*
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X268750000Y-88250000D03*
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X199800000Y-87200000D03*
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X268750000Y-83050000D03*
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X263750000Y-99050000D03*
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X263750000Y-106650000D03*
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X268750000Y-84850000D03*
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X221750000Y-86480000D03*
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X197600000Y-135400000D03*
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X196400000Y-135400000D03*
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X245550000Y-113750000D03*
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X199200000Y-122600000D03*
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X199735400Y-113805050D03*
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X199200000Y-124800000D03*
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X199600000Y-136800000D03*
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X231200000Y-113800000D03*
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X247750000Y-98500000D03*
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X269750000Y-78050000D03*
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X229745100Y-86475100D03*
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X195000000Y-135400000D03*
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X249500000Y-98750000D03*
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X268750000Y-86450000D03*
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X268750000Y-79650000D03*
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X256750000Y-113550000D03*
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X230200000Y-120750000D03*
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X269750000Y-79650000D03*
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X245450000Y-77962500D03*
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X195000000Y-136800000D03*
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X197600000Y-136800000D03*
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X250950000Y-77962500D03*
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X246000000Y-94500000D03*
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X263750000Y-100850000D03*
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X258750000Y-113650000D03*
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X234650000Y-91450000D03*
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X253000000Y-78050000D03*
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X269750000Y-84850000D03*
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X239750000Y-113550000D03*
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X268750000Y-78050000D03*
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X233850000Y-102800000D03*
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X269750000Y-88250000D03*
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X269750000Y-86450000D03*
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X248950000Y-77962500D03*
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X194800000Y-122600000D03*
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X196400000Y-136800000D03*
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X247750000Y-94500000D03*
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X225683000Y-85047000D03*
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X249250000Y-84500000D03*
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%TO.N,/PLC_RX_P*%
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X253500000Y-119450000D03*
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X250500000Y-119450000D03*
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%TO.N,+3.3V*%
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X197600000Y-126200000D03*
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X265550000Y-77850000D03*
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X197600000Y-127600000D03*
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X199600000Y-126200000D03*
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X239750000Y-78650000D03*
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X247450000Y-77962500D03*
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X229200000Y-103656250D03*
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X199600000Y-127600000D03*
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X201497900Y-113736300D03*
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X199735400Y-115323800D03*
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X265550000Y-77250000D03*
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%TO.N,/GPI0_26*%
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X210500000Y-122400000D03*
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X210400000Y-132000000D03*
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%TO.N,/TxD*%
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X213800000Y-128000000D03*
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X208750000Y-81750000D03*
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%TO.N,/RxD*%
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X214575000Y-129375000D03*
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X210950000Y-86000000D03*
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%TO.N,/RED_MISO*%
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X235600000Y-109800000D03*
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X235600000Y-95250000D03*
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%TO.N,/GPIO_EN*%
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X202697900Y-122400000D03*
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X202697900Y-126600000D03*
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%TO.N,/USB_D-*%
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X224733000Y-90730000D03*
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X226000000Y-78730000D03*
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X215500000Y-109500000D03*
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%TO.N,/USB_D+*%
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X226633000Y-90730000D03*
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X216690000Y-109500000D03*
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%TO.N,/STM32_SPI_CSn*%
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X209000000Y-132800000D03*
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X209000000Y-122400000D03*
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%TO.N,/RED_SPI_CLK*%
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X226200000Y-112400000D03*
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X226200000Y-97929000D03*
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%TO.N,Net-(J5-CC1)*%
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X224750000Y-83230000D03*
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X224750000Y-78730000D03*
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%TO.N,/PLC_RX_N*%
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X249000000Y-119468750D03*
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X252000000Y-119450000D03*
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%TO.N,/RED_RESET*%
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X232000000Y-102500000D03*
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X232000000Y-92000000D03*
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%TO.N,/RED_SPI_CSn*%
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X233200000Y-107200000D03*
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X233200000Y-97250000D03*
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X228500000Y-97250000D03*
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X228477000Y-100977000D03*
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%TO.N,/RED_SPI_INT*%
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X230049990Y-100950010D03*
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X219600000Y-81014600D03*
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X200985400Y-81014600D03*
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X230000000Y-92250000D03*
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%TO.N,/STM32_SPI_CLK*%
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X207500000Y-122400000D03*
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X207400000Y-131800000D03*
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%TO.N,/GPI0_27*%
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X212000000Y-133250000D03*
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X212000000Y-122400000D03*
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%TO.N,/GPIO_0*%
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X215200000Y-82000000D03*
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X215400000Y-134200000D03*
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%TO.N,/STM32_MOSI*%
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X204435400Y-122400000D03*
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X204400000Y-130850000D03*
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%TO.N,/GPIO_25*%
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X217800000Y-130850000D03*
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X225500000Y-94881000D03*
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%TD*%
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%TO.N,/ESP_RxD*%
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D16*
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X205000000Y-88250000D02*
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X205625000Y-87625000D01*
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X206250000Y-105500000D02*
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X205000000Y-104250000D01*
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X210000000Y-138000000D02*
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X206250000Y-134250000D01*
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X206250000Y-134250000D02*
|
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X206250000Y-105500000D01*
|
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X210000000Y-140500000D02*
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X210000000Y-138000000D01*
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X205000000Y-104250000D02*
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X205000000Y-88250000D01*
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%TO.N,/ESP_TxD*%
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X205250000Y-137500000D02*
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X205250000Y-106000000D01*
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X205250000Y-106000000D02*
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X204000000Y-104750000D01*
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X206500000Y-138750000D02*
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X205250000Y-137500000D01*
|
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X204000000Y-104750000D02*
|
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X204000000Y-87250000D01*
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X206500000Y-140500000D02*
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X206500000Y-138750000D01*
|
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X204000000Y-87250000D02*
|
|
X204375000Y-86875000D01*
|
|
%TO.N,/GPIO_EN*%
|
|
X202750000Y-137552100D02*
|
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X202750000Y-140500000D01*
|
|
X202697900Y-137500000D02*
|
|
X202750000Y-137552100D01*
|
|
X202697900Y-137250000D02*
|
|
X202697900Y-126600000D01*
|
|
X202697900Y-137250000D02*
|
|
X202697900Y-137500000D01*
|
|
%TO.N,/GPIO_0*%
|
|
X215400000Y-138850000D02*
|
|
X215400000Y-134200000D01*
|
|
X213750000Y-140500000D02*
|
|
X215400000Y-138850000D01*
|
|
%TO.N,/GPIO_EN*%
|
|
X202697900Y-137947900D02*
|
|
X202697900Y-137250000D01*
|
|
%TO.N,/ESP_RxD*%
|
|
X205625000Y-87625000D02*
|
|
X205750000Y-87500000D01*
|
|
%TO.N,/RED_MOSI*%
|
|
X227368400Y-99500000D02*
|
|
X227368400Y-93250000D01*
|
|
X227368400Y-93250000D02*
|
|
X227368400Y-93131600D01*
|
|
X227400000Y-113200000D02*
|
|
X227400000Y-99531600D01*
|
|
X227400000Y-99531600D02*
|
|
X227368400Y-99500000D01*
|
|
X220600000Y-114800000D02*
|
|
X225800000Y-114800000D01*
|
|
X225800000Y-114800000D02*
|
|
X227400000Y-113200000D01*
|
|
%TO.N,/STM32_BOOT*%
|
|
X207800000Y-84000000D02*
|
|
X207800000Y-87200000D01*
|
|
X210600000Y-90000000D02*
|
|
X210600000Y-110400000D01*
|
|
X206461300Y-82661300D02*
|
|
X207800000Y-84000000D01*
|
|
X213000000Y-112800000D02*
|
|
X213000000Y-128800000D01*
|
|
X204538700Y-82661300D02*
|
|
X206461300Y-82661300D01*
|
|
X207800000Y-87200000D02*
|
|
X210600000Y-90000000D01*
|
|
X210600000Y-110400000D02*
|
|
X213000000Y-112800000D01*
|
|
%TO.N,/PLC_RX_P*%
|
|
X252750000Y-120200000D02*
|
|
X251250000Y-120200000D01*
|
|
X253500000Y-119450000D02*
|
|
X252750000Y-120200000D01*
|
|
X251250000Y-120200000D02*
|
|
X250500000Y-119450000D01*
|
|
%TO.N,/CP*%
|
|
D17*
|
|
X242450020Y-135500000D02*
|
|
X242450020Y-134349980D01*
|
|
X266800000Y-132600000D02*
|
|
X268400000Y-134200000D01*
|
|
X244200000Y-132600000D02*
|
|
X266800000Y-132600000D01*
|
|
X242450020Y-134349980D02*
|
|
X244200000Y-132600000D01*
|
|
%TO.N,/GPI0_26*%
|
|
D16*
|
|
X210500000Y-131900000D02*
|
|
X210400000Y-132000000D01*
|
|
X210500000Y-122400000D02*
|
|
X210500000Y-131900000D01*
|
|
%TO.N,/TxD*%
|
|
X211400000Y-88900000D02*
|
|
X208750000Y-86250000D01*
|
|
X213800000Y-112200000D02*
|
|
X211400000Y-109800000D01*
|
|
X211400000Y-109800000D02*
|
|
X211400000Y-88900000D01*
|
|
X213800000Y-128000000D02*
|
|
X213800000Y-112200000D01*
|
|
X208750000Y-86250000D02*
|
|
X208750000Y-81750000D01*
|
|
%TO.N,/RxD*%
|
|
X214600000Y-129350000D02*
|
|
X214600000Y-111800000D01*
|
|
X214600000Y-111800000D02*
|
|
X212400000Y-109600000D01*
|
|
X212400000Y-87400000D02*
|
|
X211000000Y-86000000D01*
|
|
X212400000Y-109600000D02*
|
|
X212400000Y-87400000D01*
|
|
X211000000Y-86000000D02*
|
|
X210950000Y-86000000D01*
|
|
X214575000Y-129375000D02*
|
|
X214600000Y-129350000D01*
|
|
%TO.N,/RED_MISO*%
|
|
X232200000Y-126600000D02*
|
|
X235600000Y-123200000D01*
|
|
X235600000Y-120200000D02*
|
|
X235600000Y-109800000D01*
|
|
X235600000Y-123200000D02*
|
|
X235600000Y-120200000D01*
|
|
X235600000Y-109800000D02*
|
|
X235600000Y-95250000D01*
|
|
X220400000Y-126600000D02*
|
|
X232200000Y-126600000D01*
|
|
%TO.N,/CP_PWM*%
|
|
D17*
|
|
X233800000Y-129000000D02*
|
|
X268200000Y-129000000D01*
|
|
X232450020Y-135425000D02*
|
|
X232400000Y-135374980D01*
|
|
X232400000Y-135374980D02*
|
|
X232400000Y-130400000D01*
|
|
X232400000Y-130400000D02*
|
|
X233800000Y-129000000D01*
|
|
%TO.N,/GPIO_EN*%
|
|
D16*
|
|
X202697900Y-122400000D02*
|
|
X202697900Y-126600000D01*
|
|
%TO.N,/USB_D-*%
|
|
X215500000Y-109500000D02*
|
|
X215500000Y-96750000D01*
|
|
X226000000Y-78730000D02*
|
|
X225500000Y-79230000D01*
|
|
X224733000Y-84497000D02*
|
|
X224733000Y-90730000D01*
|
|
X225500000Y-83730000D02*
|
|
X224733000Y-84497000D01*
|
|
X225500000Y-79230000D02*
|
|
X225500000Y-83730000D01*
|
|
X215500000Y-96750000D02*
|
|
X220250000Y-92000000D01*
|
|
X223463000Y-92000000D02*
|
|
X224733000Y-90730000D01*
|
|
X220250000Y-92000000D02*
|
|
X223463000Y-92000000D01*
|
|
%TO.N,/USB_D+*%
|
|
X216690000Y-97060000D02*
|
|
X220875000Y-92875000D01*
|
|
X216690000Y-109500000D02*
|
|
X216690000Y-97060000D01*
|
|
X220875000Y-92875000D02*
|
|
X225325000Y-92875000D01*
|
|
X226633000Y-91567000D02*
|
|
X226633000Y-90730000D01*
|
|
X225325000Y-92875000D02*
|
|
X226633000Y-91567000D01*
|
|
%TO.N,/STM32_SPI_CSn*%
|
|
X209000000Y-122400000D02*
|
|
X209000000Y-132800000D01*
|
|
%TO.N,/RED_SPI_CLK*%
|
|
X226200000Y-112400000D02*
|
|
X226200000Y-97929000D01*
|
|
%TO.N,Net-(J5-CC1)*%
|
|
X224750000Y-78730000D02*
|
|
X224750000Y-83230000D01*
|
|
%TO.N,/PLC_RX_N*%
|
|
X251250000Y-118700000D02*
|
|
X252000000Y-119450000D01*
|
|
X249000000Y-119468750D02*
|
|
X249000000Y-119450000D01*
|
|
X249750000Y-118700000D02*
|
|
X251250000Y-118700000D01*
|
|
X249000000Y-119450000D02*
|
|
X249750000Y-118700000D01*
|
|
%TO.N,/RED_RESET*%
|
|
X232000000Y-92000000D02*
|
|
X232000000Y-102500000D01*
|
|
%TO.N,/RED_SPI_CSn*%
|
|
X228477000Y-100977000D02*
|
|
X228500000Y-100954000D01*
|
|
X233200000Y-97250000D02*
|
|
X233200000Y-107200000D01*
|
|
X228500000Y-100954000D02*
|
|
X228500000Y-97250000D01*
|
|
X230800000Y-122600000D02*
|
|
X233200000Y-120200000D01*
|
|
X220400000Y-122600000D02*
|
|
X230800000Y-122600000D01*
|
|
X233200000Y-120200000D02*
|
|
X233200000Y-107200000D01*
|
|
%TO.N,/RED_SPI_INT*%
|
|
X230049990Y-100950010D02*
|
|
X230000000Y-100900020D01*
|
|
X230000000Y-100900020D02*
|
|
X230000000Y-92250000D01*
|
|
X227600000Y-118800000D02*
|
|
X220400000Y-118800000D01*
|
|
X230049990Y-116350010D02*
|
|
X230049990Y-100950010D01*
|
|
X230049990Y-116350010D02*
|
|
X227600000Y-118800000D01*
|
|
X200985400Y-81014600D02*
|
|
X219600000Y-81014600D01*
|
|
%TO.N,/STM32_SPI_CLK*%
|
|
X207500000Y-122400000D02*
|
|
X207500000Y-131700000D01*
|
|
X207500000Y-131700000D02*
|
|
X207400000Y-131800000D01*
|
|
%TO.N,/GPI0_27*%
|
|
X212000000Y-122400000D02*
|
|
X212000000Y-133250000D01*
|
|
%TO.N,/GPIO_0*%
|
|
X213400000Y-83800000D02*
|
|
X215200000Y-82000000D01*
|
|
X215400000Y-134200000D02*
|
|
X215400000Y-111400000D01*
|
|
X215400000Y-111400000D02*
|
|
X213400000Y-109400000D01*
|
|
X213400000Y-109400000D02*
|
|
X213400000Y-83800000D01*
|
|
%TO.N,/STM32_MOSI*%
|
|
X204400000Y-130850000D02*
|
|
X204435400Y-130814600D01*
|
|
X204435400Y-130814600D02*
|
|
X204435400Y-122400000D01*
|
|
%TO.N,/GPIO_25*%
|
|
X217800000Y-130850000D02*
|
|
X217800000Y-97950000D01*
|
|
X217800000Y-97950000D02*
|
|
X220869000Y-94881000D01*
|
|
X220869000Y-94881000D02*
|
|
X225500000Y-94881000D01*
|
|
%TD*%
|
|
M02*
|